Title page for 93521038


[Back to Results | New Search]

Student Number 93521038
Author Yen-Chung Kung(龔彥中)
Author's Email Address 93521038@cc.ncu.edu.tw
Statistics This thesis had been viewed 1536 times. Download 1348 times.
Department Electrical Engineering
Year 2006
Semester 2
Degree Master
Type of Document Master's Thesis
Language zh-TW.Big5 Chinese
Title Statistical Evaluation of Transmission Quality for Digital Logic Circuits
Date of Defense 2007-07-04
Page Count 48
Keyword
  • digital logic circuits
  • transmission quality
  • Abstract As the frequency of digital logic circuit rises up, the influence of jitter and skew on the signal is getting more serious. In this thesis we build a model based on a D flip-flop chain and use a statistical method to evaluate the transmission quality of digital logic circuit affected by jitter and skew. The best timing setting can be determined and provided to designers to improve the circuit reliability via this evaluation.
    Table of Content 第一章 簡介 1
    第二章 統計與常態分布的介紹 3
    2-1 名詞解釋 3
    2-1-1 平均值(Mean) 3
    2-1-2 變異數(Variance) 3
    2-1-3 標準差(Standard Deviation) 4
    2-2 常態分布(Normal Distribution) 5
    2-2-1 常態分布的機率密度函數 5
    2-2-2 常態分布間的計算 8
    第三章 時序抖動與偏移 9
    3-1 時序抖動 9
    3-2 時序抖動的分類 10
    3-2-1 隨機性抖動 10
    3-2-2 定量性抖動 11
    3-2-3 週期性抖動 11
    3-2-4 工作週期失真 12
    3-2-5 符元互擾 12
    3-3 時脈抖動(Clock Jitter) 13
    3-3-1 相對週期性抖動量 13
    3-3-2 週期抖動量 14
    3-3-3 長時間抖動量 14
    3-4 時脈偏移 16
    第四章 數位電路時序分析 17
    4-1 D型正反器 17
    4-2 D型正反器串(D Flip-Flop Chain) 19
    4-2-1 D 型正反器串中的時脈偏移 19
    4-2-2 D 型正反器串的傳輸時序分析 21
    第五章 評量模擬與討論 28
    5-1 位元錯誤率(Bit Error Rate) 28
    5-2 參數定義 31
    5-3 時序抖動與時脈偏移的效應 34
    5-3-1 隨機性抖動與時脈偏移 34
    5-3-2 週期性抖動與時脈偏移 36
    5-3-3 週期性抖動與隨機性抖動 37
    5-3-4 總結 38
    5-4 設定時間與保持時間的效應 39
    5-4-1 對最佳讀取點的影響 39
    5-4-2 時脈偏移對設定時間與保持時間的影響 40
    5-4-3 總結 41
    5-5 時脈週期改變的效應 42
    5-5-1 位元錯誤率的變化 42
    5-5-2 設定時間與保持時間檢查 43
    5-5-3 時脈偏移的效應 44
    5-5-4 總結 45
    第六章 結論 46
    參考文獻 47
    Reference [1] Harold Larson, “Introduction to Probability”, Addison-Wesley, 1995
    [2] Saeed Ghahramani, “Fundamentals of Probability”, Prentice-Hall, 2000
    [3] “Application Note 1916: An Introduction to Jitter in Communications Systems”, Maxim Integrated Products, 2005; http://pdfserv.maxim-ic.com/en/an/AN1916.pdf
    [4] Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi, “On the Modeling and Analysis of Jitter in ATE Using Matlab”, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2005, pp. 285-293
    [5] Jie Sun, Mike Li, Jan Wilstrup, “A Demonstration of Deterministic Jitter (DJ) Deconvolution”, IEEE Instrumentation and Measurement Technology Conference, 2002, vol. 1, pp. 293-298
    [6] “Application Note HFAN-4.0.2: Converting between RMS and Peak-to-Peak Jitter at a Specified BER”, Maxim Integrated Products, 2000; http://pdfserv.maxim-ic.com/en/an/AN460.pdf
    [7] 范鶴齡, “Characterization of Scan-Chain Faults”, 中華大學電機工程學系碩士班, 2005
    [8] Emre Salman, Ali Dasdan, Feroze Taraporevala, Kayhan Kucukcakar, Eby Friedman, “Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times”, International Symposium on Quality Electronic Design, 2006
    [9] Cameron Katrai, “Timing Margin Analysis for Clock Buffers in High Speed Synchronous Networking Systems”, Pericom Semiconductor, 1999; http://www.pericom.com/pdf/applications/AN018.pdf
    [10] Mike Li, Jan Wilstrup, “On the Accuracy of Jitter Separation from Bit Error Rate Function”, International Test Conference, 2002, pp. 710-716
    Advisor
  • Jwu-E Chen(陳竹一)
  • Files
  • 93521038.pdf
  • approve immediately
    Date of Submission 2007-07-17

    [Back to Results | New Search]


    Browse | Search All Available ETDs

    If you have dissertation-related questions, please contact with the NCU library extension service section.
    Our service phone is (03)422-7151 Ext. 57407,E-mail is also welcomed.