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Student Number 92521006
Author Yao-Chang Kuo(³¢Â`¹ü)
Author's Email Address No Public.
Statistics This thesis had been viewed 1861 times. Download 880 times.
Department Electrical Engineering
Year 2005
Semester 1
Degree Master
Type of Document Master's Thesis
Language English
Title Test Algorithms for CAMs with Neighborhood Pattern-Sensitive Faults
Date of Defense 2006-01-05
Page Count 91
Keyword
  • CAM
  • Neighborhood Pattern-Sensitive Faults
  • Test Algorithm
  • Abstract This thesis presents two algorithms for detecting neighborhood pattern-sensitive faults (NPSFs) for content addressable memories. The first part presents a test algorithm for binary content addressable memories (BCAMs) with NPSFs. Differ from previous works which test BCAMs with Type-2 NPSFs, the proposed test algorithms is for Type-1 NPSFs and the BCAM without inserting design-for-testability circuitry is assumed. The proposed test algorithm requires 177 1/3N+238 2/3B Read/Write/Compare operations to cover static, passive, and active NPSFs for an NxB-bit BCAM.
    The second part of this thesis presents a test algorithm for ternary content addressable memories (TCAMs) with NPSFs. Testing NPSFs in TCAMs is more difficult than that in BCAMs due to the special TCAM cell structure. The proposed test algorithm can cover static, passive, and active Type-1 NPSFs by using constrained two-group methodology. The test algorithm requires 288N Read/Write operations to cover the defined NPSF.
    Table of Content Chapter 1Introduction1
    Chapter 2Test Algorithm of NPSF for Binary CAMs8
    2.1The Architecture of CAMs8
    2.2Fault Models of NPSF for Binary CAMs11
    2.3The Proposed NPSF Test Algorithm for Binary CAMs14
    2.4Comparison Result27
    Chapter 3Test Algorithms of NPSF for Ternary CAMs29
    3.1Fault Models of NPSF for Ternary CAMs29
    3.2The Proposed NPSF Test Algorithm for Ternary CAMs32
    3.3Result44
    Chapter 4Conclusions and Future Work46
    Appendix47
    Reference88
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    [21] Y.-S. Kang, J.-C. Lee, and S. Kang, ¡§Built-in self test for content addressable memories¡¨, in Proc. 1997 IEEE International Conference on Computer Design (ICCD), Oct. 1997, pp. 48-53.
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    [27] K.-J. Lin, and C.-W. Wu, ¡§Testing content-addressable memories using functional fault models and march-like algorithms¡¨, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 5, pp. 577-588, May 2000.
    [28] J.-F. Li, and C.-K. Lin, ¡§Modeling and testing comparison faults for ternary content addressable memories¡¨, in Proc. IEEE VLSI Test Symposium (VTS), May 2005, pp. 60-65.
    [29] T. Jamil, ¡§RAM versus CAM¡¨, in Proc. IEEE Potentials, May 1997, pp. 26-29.
    [30] J. -F. Li, ¡§Testing comparison faults of ternary cams based on comparison faults of binary cams¡¨, in Proc. IEEE Asia South Pacific Design Automation Conference, (ASP-DAC), Jan. 2005, pp. 65-70.
    Advisor
  • Jin-Fu Li(§õ¶iºÖ)
  • Files
  • 92521006.pdf
  • approve immediately
    Date of Submission 2006-01-18

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