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Student Number 90521046
Author Tien-Shang Kuo(郭添賞)
Author's Email Address s0521046@cc.ncu.edu.tw
Statistics This thesis had been viewed 2104 times. Download 1658 times.
Department Electrical Engineering
Year 2002
Semester 2
Degree Master
Type of Document Master's Thesis
Language zh-TW.Big5 Chinese
Title study of high speed and low power SiGe pMOSFET
Date of Defense 2003-07-04
Page Count 63
Keyword
  • high speed and low power
  • low power
  • SiGe
  • SiGe pMOSFET
  • Abstract Study of high speed and low power SiGe pMOSFET
    Abstract
    We have demonstrated a high performance Si1-xGex pMOSFET technology for low power and low noise circuit applications. The incorporation of 30% Ge in the strained Si1-xGex channel provides a drive current enhancement by a factor of 2.5 over its counterpart Si bulk pMOSFETs and manifests a marked advantage of two decade in exponential operating region allowing both lower power consumption and a wider dynamic range for low power circuit applications. Body effects on DC and low frequency noise characteristics in Si1-xGex pMOSFETs have also been investigated. The relative spectral density of low frequency noise in SiGe pMOSFET’s is found to be significantly lower than in Si devices. The experimental results promise the potential of SiGe/Si heterostructure MOSFETs in radio-frequency micropower applications.
    Table of Content 目錄
    摘要……………………………………………………………………Ⅰ
    致謝……………………………………………………………………Ⅱ
    圖目錄…………………………………………………………………Ⅲ
    表目錄………………………………………….…………………….Ⅶ
    序章 論文結構介紹…………………………………………………Ⅷ
    第一章 介紹………………………………………………………...…1
    1-1研究動機………………………………………………….......…1
    1-2研究目的…………………………………………………...…....3
    1-3 strain SiGe材料簡介…………………………………………...4
    第二章 矽鍺通道金氧半電晶體之低頻雜訊模擬與分析……….....9
    2-1 前言……………………………………………………….….....9
    2-2 低頻雜訊的介紹………………………………………….….....9
    2-3 元件結構與模擬…………………………………………...…..10
    2-4 結果與討論………………………………………………..…...13
    2-5 結論………………………………………………………….....17
    第三章 矽鍺金氧半電晶體製程……………………………………..25
    3-1 前言…………………………………………………….….…...25
    3-2 製程步驟………………………………………………….…....25
    3-3 以UV&OZONE (PR stripe)縮小通道長度……………….......31
    第四章 矽鍺金氧半電晶體之電性量測與分析……………………..39
    4-1 前言……………………………………………………….…....39
    4-2 直流 (I-V)量測…………………………………………….....39
    4-3 低頻雜訊量測……………………………………………..…...41
    4-4 Si/SiGe異質結構金氧半電晶體在低功率電路上的應用…....42
    4-5結論…………………………………………………………......46
    第五章 結論與未來展望……………………………………………..59
    參考文獻資料………………………………………………………….61
    Reference 參考文獻資料
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    [3] H. Dambkes, H. J. Herzog, H. Jorke, H. Kibbel, and E. Kasper, "The n-channel SiGe/Si moduladon-doped filed-effect transistor," IEEE Trans. Electron Devices. ED-33, pp. 633, 1986.
    [4] Li PW, Liao WM. Analysis of Si/SiGe channel pMOSFETs for deep-submicron scaling. Solid-State Electron 2002;46:39-44
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    [9] TMA MEDICI version 2002.2, Tech nology Modeling Associates, Inc., 2000.
    [10] Chun SK, Wang KI. Effective mass and mobility of holes in strained Si1-xGex layers on (001) Si1-yGey substrate. IEEE Trans Electron Dev 1992;39:2153-64
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    [15] F. Assaderaghi, D. Sinitsky, S. Parke, J. Bokor, P. K. Ko, and C. Hu, “A Dynamic Threshold Voltage MOSFET (DTMOS) for Ultra-low Voltage Operation,” in IEDM Tech. Dig.,1994, pp. 809-812.
    [16] F. J. De la Hidalga-W., M. J. Deen, E. A. Guiterrez-D, and F. Balestra, “Effect of the forward biasing the source-substrate junction in n-metal-oxide-semiconductor transistor for possible low power complementary metal-oxide-semiconductor integrated circuit’s applications,” J. Vac. Sci. Technol. B., vol. 16, no. 4, pp.1812-1817, 1998.
    [17] T. Tanaka, Y. Momiyama, and T. Sugii, “Fmax enhancement of dynamic threshold voltage MOSFET (DTMOS) under ultra-low supply voltage,” in IEDM Tech. Dig., 1997, pp.423-426.
    [18] T. L. Hsu, D. Tang, and J. Gong, “Low-Frequency Noise Properties of Dynamic-Threshold (DT) MOSFET’s,” IEEE Electron Device Lett., vol. 20, pp.532-534, 1999
    197] M. J. Deen and O. Marinov, “Effect of Forward and Reverse Substrate Biasing on Low-frequency Noise in Silicon PMOSFETs,” IEEE Trans. Electron Devices, vol. 49, pp. 409-413, 2002.
    [20] S. J. Mathew, G. Niu, W. B. Dubbelday, J. D. Cressler, J. A. Ott, J. O. Chu, “Hole Confinement and Its impact on Low-Frequency Noise in SiGe pFETs on Sapphire,” IEDM Tech Dig., 1997; pp.815-818.
    [21] P. W. Li and W. M. Liao, “Low-Frequency Noise Analysis of Si/SiGe Channel pMOSFETs,” Solid-State Electronics, vol. 46, p.2283-2287, 2002
    Advisor
  • Pei-Wen Li(李佩雯)
  • Files
  • 90521046.pdf
  • approve immediately
    Date of Submission 2003-07-16

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