Title page for 86324008


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Student Number 86324008
Author Chia-Ho Pan(Ϊe)
Author's Email Address No Public.
Statistics This thesis had been viewed 379 times. Download 0 times.
Department Electrical Engineering
Year 1998
Semester 2
Degree Master
Type of Document Master's Thesis
Language zh-TW.Big5 Chinese
Title Modify Angle Recording Method for Cost-efficient Implementation of CORDIC Algorithm
Date of Defense
Page Count 48
Keyword
  • AR-CORDIC
  • CORDIC
  • MAR-CORDIC
  • SQNR
  • Abstract The COordinate Rotational DIgital Computer (CORDIC) algorithm is a well-known Digital Signal Processing (DSP) algorithm for computing vector rotation and trigo-nometric functions. The main concept of the CORDIC algorithm is to decompose the de-sired rotation angle into iterations of pre-defined elementary rotation angles. The rotation operation can be performed by simple shift-and-add operations. The simplicity and regu-larity of CORDIC processor makes it very suitable for Very Large Scale Integrated (VLSI) circuit implementation. Nevertheless, the major disadvantage of CORDIC algorithm is its slow computational speed. Hence, it is essential to improve the processing latency. In the thesis, we consider a cost-efficient architecture, based on that the rotation angle is known in advance, to improve the speed performance of the CORDIC processor. We call it Modified Angle-Recording CORDIC (MAR-CORDIC). In the MAR-CORDIC scheme, we extend the set of rotational sequence from mi = {1, -1} to mi = {1, 0, -1}. Then, we also allow that each the micro-rotation can be performed more than once, so that the MAR-CORDIC can be operated in a more flexible way. On the other hand, we also restrict the maximum iteration number without sacrificing SQNR performance for cost-efficient of hardware implementation. The modifications presented in the thesis improve the speed and reduce the area of CORDIC implementation. The impact of speed performance on the CORDIC processor architecture is also discussed. Finally, we apply the MAR-CORDIC to Fast Fourier Transform (FFT) VLSI architecture. From the example, we can see its effec-tiveness in saving hardware cost in roataion-base circuit.
    Table of Content Chapter 1Introduction 1
    1.1Motivation and Objective 2
    1.2Thesis Organization 4
    Chapter 2The Conventional CORDIC and Angle Recording Method5
    2.1The Conventional CORDIC 5
    2.2Angle Recording method of the CORDIC algorithm 10
    2.2.1The advantages of AR-CORDIC 11
    2.2.2The disadvantages of the AR-CORDIC 11
    Chapter 3MAR-CORDIC and Searching Algorithm 13
    3.1The Proposed MAR-CORDIC 14
    3.2Searching Algorithm for ki and mi Sequence 16
    3.2.1Greedy Algorithm 16
    3.2.2Exhaustive Algorithm 18
    3.2.3Semi-greedy Algorithm 18
    3.2.4Design Example of the Searching Algorithm 18
    3.3Scaling Operations 21
    3.3.1Scaling operations in conventional CORDIC 22
    3.3.2Scaling operations in MAR-CORDIC 22
    Chapter 4Computational Complexity and SQNR Performance 24
    4.1Comparison of the three searching algorithms 24
    4.2Relationship between SQNR and parameters 26
    4.2.1SQNR versus wordlength (N) 26
    4.2.2SQNR versus restricted iteration number (R) 27
    4.3Comparison of Hardware Complexity and Timing Delay 28
    4.3.1Comparison of Area 29
    4.3.2Comparison of speed 29
    Chapter 5Implementation and Verification of MAR-CORDIC 31
    5.1VLSI Implementation 31
    5.1.1Iterated CORDIC structure 31
    5.1.2Parallel and pipelined CORDIC structure 32
    5.2Verification of conventional CORDIC and MAR-CORDIC 34
    5.2.1Simulation Result of conventional CORDIC 34
    5.2.2Simulation Result of MAR-CORDIC 34
    Chapter 6Application of MAR-CORDIC to SIPO Lattice-based FFT 38
    6.1Parallel Lattice Structure of the FFT 38
    6.2Application of the MAR-CORDIC Structure to FFT 41
    Chapter 7Conclusion 44
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    Advisor
  • An-Yeu Wu(dwt)
  • Files No Any Full Text File.
    Date of Submission

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